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The University of Hyderabad has invited applications for admission to its M.Tech. (Microelectronics & VLSI Design) programme for the academic session 2026-27. Admission will be offered through GATE 2026 scores and CCMT counselling. Candidates possessing a B.E./B.Tech degree in relevant engineering disciplines or an M.Sc. in Computer Science/Electronics can apply. Interested applicants are advised to check the eligibility criteria, counselling schedule, seat allotment process, and other admission-related details before participating in the admission process.
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University of Hyderabad M.Tech. (Microelectronics & VLSI Design) Admission: Overview |
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| Particulars | Details |
|---|---|
| University Name | University of Hyderabad |
| Course Name | M.Tech. (Microelectronics & VLSI Design) |
| Duration | 2 Years |
| Admission Mode | Through GATE Score & CCMT Counselling |
| Course Type | Full-Time |
| Academic Session | 2026-27 |
| Event | Date |
|---|---|
| Registration Start Date | 25 May 2026 |
| Last Date for Registration & Fee Payment | 30 June 2026 |
| Merit list for Round-1 of Counselling | 9 July 2026 |
| Round 1 Seat Allotment | 12 June 2026 |
| Option for payment (online on SAMARTH portal) | 09/07/2026 to 12/07/2026 |
| Online verification of documents, query raising and submission of replies by the candidates and provisional allotment of sea |
13/07/2026 & 16/07/2026 |
| Physical Reporting for document verification and issue of admit card/hostel accommodation | 20/07/2026 to 22/07/2026 |
| Commencement of Classes | 23/07/2026 |
Candidates are advised to regularly check the official admission portal for the latest counselling and admission updates.
Application Fees
Application fees vary by category and must be paid online:
Note:- Fees once paid will not be refunded.
Age Limit
Candidates must fulfill any one of the following educational qualifications:
Option 1: B.E. / B.Tech Degree
Candidates should have secured at least 60% aggregate marks or equivalent CGPA in B.E./B.Tech. in any of the following disciplines:
Option 2: M.Sc. Degree
Candidates should have secured at least 60% aggregate marks or equivalent CGPA in M.Sc. in any of the following subjects:
Fellowship / Scholarship
AICTE Fellowship applicable to GATE-qualified candidates will also be extended to students admitted to the M.Tech. (Microelectronics & VLSI Design) programme, subject to AICTE norms and guidelines.
Note: Candidates are advised to carefully verify their eligibility and read the official admission notification before applying.
Mode of Selection
Note:- The list of short listed candidates will be posted on this website as per the given schedule. No individual communication will be sent to the candidate.
Admission is primarily based on a valid GATE score through CCMT counselling.
Yes, candidates generally require a valid GATE score in the relevant discipline.
The M.Tech. (Microelectronics & VLSI Design) program is of 2 years duration.
CCMT 2026 registration started on 15 May 2026.
The last date for registration and fee payment was 05 June 2026.
No specific age limit has been prescribed for this M.Tech. program.